Re: list of obsolete instructions?

On Nov 19, 2:12 pm, "Rod Pemberton" <spamt...@xxxxxxxxxx> wrote:
"MQ" <spamt...@xxxxxxxxxx> wrote in message

news:7a60068d-bd9d-470b-adf9-dde0ee4f153d@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx

I'm after a list of obsolete instructions from the 8086 onwards.  I
can't seem to find any, although I know they exist (for example, POP
CS of the 8086, and MOVing into test registers).

Any known "undocumented" opcodes e.g., SALC, ICEBP, and/or cpu specific
opcodes, e.g., Cyrix or NEC V20 are likely obsolete.

Unless I'm mistaken SALC is still de-facto supported on the modern
Intel and AMD CPUs.

These are obsolete (except on older cpu's...):
  0x0F                POP CS - 8086 only (2 byte instruction prefix 286+)
  0x0F 0xA6  obsolete duplicate opcode: 386 XBTS, 486-A CMPXCHG 8
  0x0F 0xA7  obsolete duplicate opcode: 386 IBTS, 486-A CMPXCHG 16|32

AMD64 manuals obsoletes these for 64-bit mode:
  inc, dec - single byte versions of are now REX prefixes
  call far, jmp far
  segments: ss, ds, es

CS?

  push, pop of segments
  lds, les

Even if you can load FS and GS using those instructions, at least in
the kernel mode the base is set through an MSR. Should we then call
the instructions with FS and GS semi-obsolete then?

  pusha, popa
  into, bound
  aaa, aad, aam, aas, daa, das
  icebp
  82h alias for 80h

There are duplicates in shift/rotate instructions and test with
immediate instructions. Don't remember opcodes off top of the head,
but those test with immediate instructions are also in some group.

  sysenter, sysexit
  arpl
  salc
  lahf, sahf (for some cpu's)

Yep, availability of LAHF/SAHF in 64-bit mode can be determined
through CPUID. Weird thing.

*Some* of the "undocumented" opcodes identified by Robert Collins might be
obsolete:
----
  0xD4 imm8 AAM ASCII Adjust after Multiplication
  0xD5 imm8 AAD ASCII Adjust before Division
  0x0F 0x10 mod,reg,r/m UMOV User MOVe data
  0x0F 0x11 mod,reg,r/m UMOV User MOVe data
  0x0F 0x12 mod,reg,r/m UMOV User MOVe data
  0x0F 0x13 mod,reg,r/m UMOV User MOVe data
  0x0F 0x05 LOADALL 286 Loads entire CPU state
  0x0F 0x07 LOADALL 386 Loads entire CPU state
  0xF1 INT01/ICEBP In-Circuit Emulator Break Point (ICEBP)/Intel exception 1
   (0xF1 SMI 486 System Management Interrupt, AMD INT 1, not an exception)
  0xD6 SALC Set AL on Carry (i.e., SBB AL,AL w/out modifying flags)
  0x0F 0100cccc mod,reg,r/m CMOV Conditional MOVe
  0xDA 11cccrrr FCMOV Floating point Conditional MOVe
  0xDB 11cccrrr FCMOV Floating point Conditional MOVe
  0xDB 111uuiii FCOMI Floating point COMpare, set Integer flags
  0xDF 111uuiii FCOMI Floating point COMpare, set Integer flags
  0x0F 0x33 RDPMC ReaD Performance Monitor Counter
  0x0F 0x0B UD2 Intel Undefined opcode 2
  0x0F 0xB9 UD1 Intel Undefined opcode 1

Aliases are likely obsolete or being phased out:
  0x82 alias 0x80     alias for instructions:ADC,ADD,AND,CMP,OR,SBB,SUB,XOR
  f6 /1 alias for f6 /0 - test
  f7 /1 alias for f7 /0 - test

Yeah, I meant these.

  sal /6 is an alias for shl /4

These are still de-facto supported, even in 64-bit mode.

NASMDOC.TXT from the old 0.98.39 version of NASM lists these as "UNDOC"
(mostly reiterates Mr. Collins...):
       CMPXCHG486 r/m8,reg8          ; 0F A6 /r             [486,UNDOC]
       CMPXCHG486 r/m16,reg16        ; o16 0F A7 /r         [486,UNDOC]
       CMPXCHG486 r/m32,reg32        ; o32 0F A7 /r         [486,UNDOC]
       FFREEP fpureg                 ; DF C0+r              [286,FPU,UNDOC]
       IBTS r/m16,reg16              ; o16 0F A7 /r         [386,UNDOC]
       IBTS r/m32,reg32              ; o32 0F A7 /r         [386,UNDOC]
       LOADALL                       ; 0F 07                [386,UNDOC]
       LOADALL286                    ; 0F 05                [286,UNDOC]
       POP CS                        ; 0F                   [8086,UNDOC]

POP CS is obsolete beginning with 80186 or 80286, since two-byte
opcode instructions begin with the 0F byte. I think there're some
other instructions obsolete with redefinition of opcodes.

       SALC                          ; D6                  [8086,UNDOC]
       SMI                           ; F1                   [386,UNDOC]
       UD0                           ; 0F FF                [186,UNDOC]
       UD1                           ; 0F B9                [186,UNDOC]
       UMOV r/m8,reg8                ; 0F 10 /r             [386,UNDOC]
       UMOV r/m16,reg16              ; o16 0F 11 /r         [386,UNDOC]
       UMOV r/m32,reg32              ; o32 0F 11 /r         [386,UNDOC]
       UMOV reg8,r/m8                ; 0F 12 /r             [386,UNDOC]
       UMOV reg16,r/m16              ; o16 0F 13 /r         [386,UNDOC]
       UMOV reg32,r/m32              ; o32 0F 13 /r         [386,UNDOC]
       XBTS reg16,r/m16              ; o16 0F A6 /r         [386,UNDOC]
       XBTS reg32,r/m32              ; o32 0F A6 /r         [386,UNDOC]

You might check 86BUGS.LST from Ralf Brown's interrupt list, or Sandpile.org
where Christian Ludloff has compiled instruction charts.  E.g., Sandpile.org
shows "MOV Td,Rd" for "(80386/486)" only.

Rod Pemberton

Alex

.

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