Forward error correction
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In telecommunication and information theory, forward error correction (FEC) is a system of error control for data transmission, whereby the sender adds redundant data to its messages, also known as an error-correction code. This allows the receiver to detect and correct errors (within some bound) without the need to ask the sender for additional data. The advantages of forward error correction are that a back-channel is not required and retransmission of data can often be avoided (at the cost of higher bandwidth requirements, on average). FEC is therefore applied in situations where retransmissions are relatively costly or impossible. In particular, FEC information is usually added to most mass storage devices to protect against damage to the stored data.
FEC devices are often located close to the receiver of an analog signal, in the first stage of digital processing after a signal has been received. That is, FEC circuits are often an integral part of the analog-to-digital conversion process, also involving digital modulation and demodulation, or line coding and decoding. Many FEC coders can also generate a bit-error rate (BER) signal which can be used as feedback to fine-tune the analog receiving electronics. Soft-decision algorithms, such as the Viterbi decoder, can take (quasi-)analog data in, and generate digital data on output.
The maximum fraction of errors that can be corrected is determined in advance by the design of the code, so different forward error correcting codes are suitable for different conditions.
 How it works
FEC is accomplished by adding redundancy to the transmitted information using a predetermined algorithm. Each redundant bit is invariably a complex function of many original information bits. The original information may or may not appear in the encoded output; codes that include the unmodified input in the output are systematic, while those that do not are nonsystematic.
An extremely simple example would be an analog to digital converter that samples three bits of signal strength data for every bit of transmitted data. If the three samples are mostly zero, the transmitted bit was probably a zero, and if three samples are mostly one, the transmitted bit was probably a one. The simplest example of error correction is for the receiver to assume the correct output is given by the most frequently occurring value in each group of three.
|Triplet received||Interpreted as|
This allows an error in any one of the three samples to be corrected by "democratic voting". This is a highly inefficient FEC, but it does illustrate the principle. In practice, FEC codes typically examine the last several dozen, or even the last several hundred, previously received bits to determine how to decode the current small handful of bits (typically in groups of 2 to 8 bits).
Such triple modular redundancy, the simplest form of forward error correction, is widely used.
 Averaging noise to reduce errors
FEC could be said to work by "averaging noise"; since each data bit affects many transmitted symbols, the corruption of some symbols by noise usually allows the original user data to be extracted from the other, uncorrupted received symbols that also depend on the same user data.
- Because of this "risk-pooling" effect, digital communication systems that use FEC tend to work well above a certain minimum signal-to-noise ratio and not at all below it.
- This all-or-nothing tendency becomes more pronounced as stronger codes are used that more closely approach the theoretical limit imposed by the Shannon limit.
- Interleaving FEC coded data can reduce the all or nothing properties of transmitted FEC codes. However, this method has limits; it is best used on narrowband data.
Most telecommunication systems used a fixed channel code designed to tolerate the expected worst-case bit error rate, and then fail to work at all if the bit error rate is ever worse. However, some systems adapt to the given channel error conditions: hybrid automatic repeat-request uses a fixed FEC method as long as the FEC can handle the error rate, then switches to ARQ when the error rate gets too high; adaptive modulation and coding uses a variety of FEC rates, adding more error-correction bits per packet when there are higher error rates in the channel, or taking them out when they are not needed.
 Types of FEC
- Block codes work on fixed-size blocks (packets) of bits or symbols of predetermined size. Practical block codes can generally be decoded in polynomial time to their block length.
- Convolutional codes work on bit or symbol streams of arbitrary length. They are most often decoded with the Viterbi algorithm, though other algorithms are sometimes used. Viterbi decoding allows asymptotically optimal decoding efficiency with increasing constraint length of the convolutional code, but at the expense of exponentially increasing complexity. A convolutional code can be turned into a block code, if desired.
There are many types of block codes, but among the classical ones the most notable is Reed-Solomon coding because of its widespread use on the Compact disc, the DVD, and in hard disk drives. Golay, BCH, Multidimensional parity, and Hamming codes are other examples of classical block codes.
Hamming ECC is commonly used to correct NAND flash memory errors. This provides single-bit error correction and 2-bit error detection. Hamming codes are only suitable for more reliable single level cell (SLC) NAND. Denser multi level cell (MLC) NAND requires stronger multi-bit correcting ECC such as BCH or Reed-Solomon[dubious ].
Classical block codes are usually implemented using hard-decision algorithms, which means that for every input and output signal a hard decision is made whether it corresponds to a one or a zero bit. In contrast, soft-decision algorithms like the Viterbi decoder process (discretized) analog signals, which allows for much higher error-correction performance than hard-decision decoding.
Nearly all classical block codes apply the algebraic properties of finite fields.
 Concatenated FEC codes for improved performance
Classical (algebraic) block codes and convolutional codes are frequently combined in concatenated coding schemes in which a short constraint-length Viterbi-decoded convolutional code does most of the work and a block code (usually Reed-Solomon) with larger symbol size and block length "mops up" any errors made by the convolutional decoder.
 Low-density parity-check (LDPC)
Low-density parity-check (LDPC) codes are a class of recently re-discovered highly efficient linear block codes. They can provide performance very close to the channel capacity (the theoretical maximum) using an iterated soft-decision decoding approach, at linear time complexity in terms of their block length. Practical implementations can draw heavily from the use of parallelism.
LDPC codes were first introduced by Robert G. Gallager in his PhD thesis in 1960, but due to the computational effort in implementing en- and decoder and the introduction of Reed-Solomon codes, they were mostly ignored until recently.
LDPC codes are now used in many recent high-speed communication standards, such as DVB-S2 (Digital video broadcasting), WiMAX (IEEE 802.16e standard for microwave communications), 10GBase-T Ethernet (802.3an) and G.hn/G.9960 (ITU-T Standard for networking over power lines, phone lines and coaxial cable).
 Turbo codes
Turbo coding is an iterated soft-decoding scheme that combines two or more relatively simple convolutional codes and an interleaver to produce a block code that can perform to within a fraction of a decibel of the Shannon limit. Predating LDPC codes in terms of practical application, they now provide similar performance.
One of the earliest commercial applications of turbo coding was the CDMA2000 1x (TIA IS-2000) digital cellular technology developed by Qualcomm and sold by Verizon Wireless, Sprint, and other carriers. It is also used for the evolution of CDMA2000 1x specifically for Internet access, 1xEV-DO (TIA IS-856). Like 1x, EV-DO was developed by Qualcomm, and is sold by Verizon Wireless, Sprint, and other carriers (Verizon's marketing name for 1xEV-DO is Broadband Access, Sprint's consumer and business marketing names for 1xEV-DO are Power Vision and Mobile Broadband, respectively.).
 See also
- ^ M. Baldi, F. Chiaraluce. A Simple Scheme for Belief Propagation Decoding of BCH and RS Codes in Multimedia Transmissions. International Journal of Digital Multimedia Broadcasting, Volume 2008.
- Clark, George C., Jr., and J. Bibb Cain. Error-Correction Coding for Digital Communications. New York: Plenum Press, 1981. ISBN 0-306-40615-2.
- Lin, Shu, and Daniel J. Costello, Jr. "Error Control Coding: Fundamentals and Applications". Englewood Cliffs, N.J.: Prentice-Hall, 1983. ISBN 0-13-283796-X.
- Mackenzie, Dana. "Communication speed nears terminal velocity". New Scientist 187.2507 (9 July 2005): 38–41. ISSN 0262-4079.
- Wicker, Stephen B. Error Control Systems for Digital Communication and Storage. Englewood Cliffs, N.J.: Prentice-Hall, 1995. ISBN 0-13-200809-2.
- Wilson, Stephen G. Digital Modulation and Coding, Englewood Cliffs, N.J.: Prentice-Hall, 1996. ISBN 0-13-210071-1.
- "Error Correction Code in Single Level Cell NAND Flash memories" 16/02/2007
- United States Patent 6041001 "Method of increasing data reliability of a flash memory device without compromising compatibility"
- United States Patent 7187583 "Method for reducing data error when flash memory storage device using copy back command"
- "Forward Error-Correction Coding". Crosslink - The Aerospace Corporation magazine of advances in aerospace technology. The Aerospace Corporation. Volume 3, Number 1 (Winter 2001/2002). http://www.aero.org/publications/crosslink/winter2002/04.html. Retrieved 2006-03-05.
- "How Forward Error-Correcting Codes Work". Crosslink - The Aerospace Corporation magazine of advances in aerospace technology. The Aerospace Corporation. http://www.aero.org/publications/crosslink/winter2002/04_sidebar1.html. Retrieved 2006-03-05.
- Morelos-Zaragoza, Robert (2004). "The Error Correcting Codes (ECC) Page". http://www.eccpage.com/. Retrieved 2006-03-05.